Powerful and Feasible Processor Interconnections With an Evaluation of Their Communications Capabilities

The majority of existing interprocessor connection networks are plagued by poor topological properties that result in large memory latencies for DSM (Distributed Shared-Memory) computers. On the other hand, scalable networks with very good topological properties are often impossible to build because of their prohibitively high VLSI (e.g., wiring) complexity. Such a network is the generalized hypercube (GH). The GH supports full-connectivity of all its nodes in each dimension and is characterized by outstanding topological properties. Also, low-dimensional GHs have very large bisection widths. We propose here a new class of scalable interprocessor connections, namely HOWs (Highly-Overlapping Windows), capable of lower complexity than GHs and comparable performance. HOWs are obtained from GHs by uniformly removing edges to produce feasible systems of lower wiring complexity. Resulting systems contain numerous highly-overlapping GHs of smaller size. Also, the classical GH belongs to this new class of interconnections. We analyze the communications capabilities of 2-D HOWs and demonstrate that in practical cases they perform much better than binary hypercubes for important communications patterns. They also perform comparably to GHs. We develop algorithms for one-to-one unicasting, one-to-all broadcasting, all-to-all broadcasting, one-to-all personalized, and all-to-all personalized communications, under various communications models.